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Industry-Standard Design Flows

NEC Electronics supports ASIC design flows from three major EDA vendors, so that you can use the front-end tools of your choice — best-in-class tools that suit your design requirements. Because of close cooperation between NEC Electronics and the EDA vendors, new tools can be adopted quickly.

 
 

Documentation


 
 
  Design Environment PDF
(2/2007) (393 KB)
 
 
  Design Methodology Technology Backgrounder
(2/2007) (331 KB)
 
 

By offering multiple physical design flows, NEC Electronics fully supports the physical design features in front-end tools and ensures design integrity from RTL to GDSII. This tight integration between front- and back-end tools enables high-quality results for design requirements such as low-power design, design for manufacturability (DFM), signal integrity and power integrity.


Multiple Physical Design Flows

Note: Not all tools are available for all products. Contact NEC Electronics for details.


OpenCAD® Design Framework

All of the tools in NEC Electronics' design flows work within our OpenCAD design suite framework. The OpenCAD framework enables seamless interaction among tools from different vendors by providing a central unified database that ensures consistency across the tool libraries.

Design and Analysis Tool Line-up

 

Physical Implementation Tool Line-up

Function Name Vendor Tool Name
Design Planning Cadence, Magma SOC Encounter, BlastPrototype
NEC Electronics Ace_floorplan & Galet-Lite
Synopsys LEDA
Logic Synthesis Synopsys Design Compiler
Magma BlastCreate
Cadence RC
DFT NEC Electronics TestAct (BSCAN, BIST, IP)
Synopsys DFT & BS Compiler, TetraMax
LogicVision MBIST LBIST
Power Calculation Sequence PowerTheater
NEC Electronics Powerd, HARPS
Logic Verification Cadence NC_Verilog
Mentor ModelSim
Synopsys VCS
 
Function Name Vendor Tool Name
Physical Design Cadence Silicon Ensemble, SoC Encounter
Synopsys Physical Compiler
Magma Blast Fusion/Noise
Signal Integrity NEC Electronics Emcheck, Crosstalk, Galet-Lite
Magma Blast Noise
Sequence Physical Studio
STA Synopsys PrimeTime
Voltage Drop Cadence VoltageStorm
RC Extraction & Delay Calculation NEC Electronics SQ-net, opc_Netdelay
RC Extraction Synopsys Star-RCXT
Formal Verification Synopsys Formality
Cadence Conformal-LEC
Physical Verification Mentor Caliber
 
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