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Products > Digital AV LSI > MPEG Codec, Decoder for BD/DVD Recorder, Player > MPEG Codec, Decoder for BD Recorder, Player >

EMMA3   (µPD61334A)


Overview Target System Product Specification Block Diagram Product Lineup


Overview

EMMA3(µPD61334A)

The EMMA3 DVD decoders for next-generation players / recorders with digital TV receivers cut down the BOM costs by incorporating all of the necessary functions for back-end A/V processing in emerging markets.


Target System

  • Next-generation DVD players / recorders

Product Specification

Product Specification
CPU
  • Main CPU: 64-, 32-bit VR5500 CPU core that executes 655 Dhrystone MIPS at a clock speed of 327 MHz
  • Sub-CPU: 32-bit MIPS32™ CPU core that executes 457 Dhrystone MIPS at a clock speed of 327 MHz
Unified memory controller
  • 32-, 48-bit DDR2-667 SDRAM
  • 8 GB maxmim memory size
PCI
  • 3.3V 32-bit PCI interface at 33 MHz
External memory interface (EMI)
  • ROM interface for NOR/NAND flash ROM
    • Four chip selection terminals
    • 64 MB total address area
  • General input/output (GIO) interface
    • Four chip selection terminals
    • 16 MB total address area
Stream processor
  • MPEG2-PS, MPEG2-TS, and MEPG1 system demultiplexing
  • HD DVD, DVD-Video, DVD-Video recording, and Video CD 2.0 formats
  • ARIB support
  • Integrated CSS, CPRM descrambler
  • Integrated CPRM, AACS scrambler/descrambler
  • Integrated DES, 3-DES (family option), AES (family option)
MPEG-AVC/VC1 video decode engine
  • MPEG2, MP@HL, and MPEG1 video
  • MPEG4 ASP@ L5 visual standard without 1/4 pixel / global motion compensation (optional)
  • MPEG4 AVC/H.264 HP@L4.1, MP@L3.2
  • VC1 AP@L3, AP@L2
  • Full-trick play support
  • JPEG decoding accelerator
Audio decode engine
  • Dolby Digital, DTS
  • Dolby Digital Plus, DTS-HD, Dolby True HD
  • MPEG1 Layer 1/2, MPEG2 AAC
  • LPCM for HD DVD and DVD
  • CD-DA
  • Trick play support
Display/Graphics BitBlt engine
  • Four video planes
  • Five on-screen display planes
  • Anti-flicker filter
  • Alpha blending
  • IP-conversion / 3D noise reducer for 480i video
  • Graphics Bitblt engine
  • Powerful 2-D / 1-D block move operations
  • Bitblt operation with alpha blending
  • Independent horizontal and vertical resizing filters
  • Color
Video encoder
  • NTSC, PAL, SECAM /HDTV (720p / 1080i / 480p / 576p) formats
  • Five-channel, 12-bit D/A converter at 150 MHz
  • Macrovision 7.1.L1 and Macrovision AGC 1.2
Storage interface
  • Two-channel IDE interface to optical drive/HDD
Peripherals
  • 16550 UART with 3-channel, 16-byte FIFO
  • Three-channel clocked serial interface (CSI)
  • Three-channel I2C interface
  • ISO-7816 SmartCard interface
  • Infrared transmitter interface
  • General-purpose I/Os
Process
  • 90 nm CMOS process
Power supply
  • 1.0V (core logic), 1.8V (DDR2 SDRAM interface), 3.3V (I/O interface)
Package
  • 933-pin plastic BGA (35 mm x 35 mm ball pitch: 1.00 mm)



Block Diagram

Block Diagram


Product Lineup

T.B.D



This device is protected by U.S. patent numbers 5,583,936; 6,516,132; 6,836,549; and 7,050,698, and other intellectual property rights. The use of Macrovision's copy protection technology in the device must be authorized by Macrovision and is intended for home and other limited pay-per-view uses only, unless otherwise authorized in writing by Macrovision. Reverse engineering or disassembly is prohibited.
This Device can only be sold or distributed to Authorized Buyers.


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