Beginning of this page
Jump to main content

Please note that JavaScript and style sheet are used in this website,
Due to unadaptability of the style sheet with the browser used in your computer, pages may not look as original.
Even in such a case, however, the contents can be used safely.

Products > Digital AV LSI > MPEG Decoder for STB > MPEG4(H.264) >

EMMA3SL/HD (MC10085 - MC10088)

H.264 Supporting MPEG Decoder LSI for Set-Top Boxes


Overview Target System Product Specification Block Diagram Product Lineup


Overview

MC10085 - MC10088

The EMMA3SL/HD (MC10085 - MC10088) is an image processing LSI chip that integrates in a single chip the functions required for receiving digital broadcasting, such as decode functions for digital video and audio signals, and image display functions.

EMMA3SL/HD decoders can process the leading-edge H.264 video format, in addition to advanced audio standards such as Dolby® Digital Plus and HE-AAC, and offer on-chip USB and Ethernet connectivity for overall system cost reduction. Furthermore, it incorporates various high-vision-supporting circuits, such as an HDMI interface, which is gaining popularity in the market as the interface standard for digital home appliances in recent years. These devices are ideal for STBs in Europe, Russia, India, and Brazil, where the H.264 format is gaining popularity.


Target System

  • H.264 STBs

Product Specification

Product Specification
On-chip CPU
  • Main CPU:
    • MIPS32® 24KEc® core
    • 470MIPS@327MHz
    • 16 KB instruction cache; 16 KB data cache
Memory Interface
  • DDR2 memory interface
    • 16-, 32-bit bus
    • 32 to 256 MB total memory
    • 2.6 GB/s bandwidth
  • Flash ROM interface
    • Up to 64 MB capacity
    • 8-, 16-bit bus
MPEG Transport Stream Processing Engine
  • Four dedicated transport stream input ports: two serial and two parallel
  • MPEG2 TS
  • 36 PID filters
  • 32 section filters
MPEG Video Decoder
  • MPEG2 MP@ML, MP@HL, H.264/AVC HP@L4.0, MP@L4.0, 3.2, and VC-1 AP@L3, L2 formats
Audio Controller
  • MPEG-1/2 L1/2, MPEG4 AAC, MPEG4 HE-AAC, DD, DD+, MP3, and WMA formats
  • SPDIF output
  • 5.1-ch output
Graphics and Display Engine
  • 2D Bit BLT
  • Six graphics planes (five main planes and one sub-plane)
  • 256-level alpha-blending function
  • Real-time video scaling (1/4 to 8/1 H/V) x 2
  • De-interlace function
Video Encoder
  • 6-channel DAC for simultaneous analog CVBS, YC, and RGB/YCbCr output
  • PAL, SECAM and NTSC formats
USB 2.0 Host Controller
  • Compliant with EHCI specification
  • High (480 Mbps), full (12 Mbps), and low speeds (1.5 Mbps)
Ethernet Interface
  • Integrated Ethernet MAC conforming to IEEE 802.3/3u/3x
  • Compliant with RMII (10 Mbps/100 Mbps Ethernet) specification
HDMI Interface
  • HDMI transmitter
  • HDCP support via internal EEPROM
Peripherals
  • Two-channel FUART
  • One-channel UART
  • Two-channel SmartCard interface
  • Two-channel I2C interface
  • Clocked serial interface
  • Two system timers
    • WDT
    • RTC
  • Two-channel IR receiver; IR blaster
Package
  • 596-pin plastic BGA



Block Diagram

Block Diagram


Product Lineup

T.B.D



This device is protected by U.S. patent numbers 5,583,936; 6,516,132; 6,836,549; and 7,050,698, and other intellectual property rights. The use of Macrovision's copy protection technology in the device must be authorized by Macrovision and is intended for home and other limited pay-per-view uses only, unless otherwise authorized in writing by Macrovision. Reverse engineering or disassembly is prohibited.
This Device can only be sold or distributed to Authorized Buyers.


Inquiry Concerning Digital AV LSI



Related Information


 
Click here to rate this page