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Products > Digital AV LSI > MPEG Decoder for Digital TV >

EMMA2TH   (µPD61162)

Digital Hi-Vision System LSI


Overview Target System Product Specification Block Diagram Product Lineup


Overview

µPD61162

The EMMA2TH (µPD61162) decoder incorporates advanced Picture Quality Control (PQC) functions and all of the other functions necessary for processing of digital broadcasts in emerging TV applications.


Target System

  • Digital TVs supporting BS/CS/terrestrial digital broadcasting

Product Specification

Product Specification
On-chip CPU
  • Quad CPU architecture of NEC Electronics VR5500 core, MIPS32® 4KEc® core, and two MIPS32® 4KEm® cores
    • Main CPU: NEC Electronics VR5500 core
      • 654MIPS@327MHz
    • Sub CPU: MIPS32® 4KEc® core
      • 236MIPS@196MHz
    • 2 audio CPUs: MIPS32® 4KEm® core
      • 236MIPS@196MHz
Memory Interface
  • DDR2 memory interface
    • Supports up to 256 MB
    • Band width: 2.6 GB/s
  • Flash ROM interface
    • Supports up to 64 MB
    • Supports 8-/16-bit bus width
MPEG Transport
Stream Processing Engine
  • Hardware processing architecture
  • Stream I/Fs: Up to four inputs out of one parallel input, six serial inputs, and one playback input
  • Supports MPEG-compliant transport streaming
  • Maximum transport stream processing rate: 210 Mbps total (four inputs)
  • 160-section filter
MPEG Video Decoder
  • Complies with MPEG MP@HL
Audio Controller
  • Supports MPEG1/MPEG2 layer 1/2
  • Supports MPEG AAC
  • Supports SPDIF output
Graphics Engine
  • Motion-adaptive de-interlacer mounted
  • 2D BitBlt
Display Engine
  • Supports five ARIB planes
  • 256-level alpha-blending function
  • Horizontal and vertical non-linear scaling
Image Quality Adjustment
  • Average Picture Level observation function
  • Brightness and contrast adjustment
  • Selective color correction function
  • 3D noise reducer function
Peripherals
  • UART x 5
  • SmartCard I/F x 1
  • I2C x 3
  • Clocked Serial I/F
  • IR receiver/blaster
  • Timer: Two systems, WDT, RTC
PCI Interface
  • Complies with PCI Rev1.1
  • Clock frequency: 33 MHz, bus width: 32 bits
  • Operates as PCI host or PCI device
Digital Video Output
  • Main screen
    • LVDS Single Link
    • ITU-R BT.709
  • Sub screen
    • ITU-R BT.656



Block Diagram

Block Diagram


Product Lineup

T.B.D



This device is protected by U.S. patent numbers 5,583,936; 6,516,132; 6,836,549; and 7,050,698, and other intellectual property rights. The use of Macrovision's copy protection technology in the device must be authorized by Macrovision and is intended for home and other limited pay-per-view uses only, unless otherwise authorized in writing by Macrovision. Reverse engineering or disassembly is prohibited. Macrovision-capable devices may only be sold to Macrovision Authorized Buyers.
This device is protected by U.S. patent numbers 6,600,873 and other intellectual property rights.


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